Commit 3cb9ebc9 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: add channel index table for UMC v12 



Get UMC phyical channel index according to node id, umc instance and
channel instance.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent df38fe12

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+1 −0
Original line number Diff line number Diff line
@@ -1499,6 +1499,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) 
		adev->umc.node_inst_num /= UMC_V12_0_UMC_INSTANCE_NUM;

		adev->umc.channel_offs = UMC_V12_0_PER_CHANNEL_OFFSET;

		adev->umc.active_mask = adev->aid_mask;

		adev->umc.channel_idx_tbl = &umc_v12_0_channel_idx_tbl[0][0][0];

		if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu)

			adev->umc.ras = &umc_v12_0_ras;

		break;

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

+14 −0
Original line number Diff line number Diff line
@@ -27,6 +27,20 @@ 
#include "umc/umc_12_0_0_offset.h"

#include "umc/umc_12_0_0_sh_mask.h"



const uint32_t

	umc_v12_0_channel_idx_tbl[]

			[UMC_V12_0_UMC_INSTANCE_NUM]

			[UMC_V12_0_CHANNEL_INSTANCE_NUM] = {

		{{3,   7,   11,  15,  2,   6,   10,  14},  {1,   5,   9,   13,  0,   4,   8,   12},

		 {19,  23,  27,  31,  18,  22,  26,  30},  {17,  21,  25,  29,  16,  20,  24,  28}},

		{{47,  43,  39,  35,  46,  42,  38,  34},  {45,  41,  37,  33,  44,  40,  36,  32},

		 {63,  59,  55,  51,  62,  58,  54,  50},  {61,  57,  53,  49,  60,  56,  52,  48}},

		{{79,  75,  71,  67,  78,  74,  70,  66},  {77,  73,  69,  65,  76,  72,  68,  64},

		 {95,  91,  87,  83,  94,  90,  86,  82},  {93,  89,  85,  81,  92,  88,  84,  80}},

		{{99,  103, 107, 111, 98,  102, 106, 110}, {97,  101, 105, 109, 96,  100, 104, 108},

		 {115, 119, 123, 127, 114, 118, 122, 126}, {113, 117, 121, 125, 112, 116, 120, 124}}

	};



/* mapping of MCA error address to normalized address */

static const uint32_t umc_v12_0_ma2na_mapping[] = {

	0,  5,  6,  8,  9,  14, 12, 13,

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

+5 −0
Original line number Diff line number Diff line
@@ -115,6 +115,11 @@ 
		(pa) |= (UMC_V12_0_CHANNEL_HASH_CH6(channel_idx, pa) << UMC_V12_0_PA_CH6_BIT); \

	} while (0)



extern const uint32_t

	umc_v12_0_channel_idx_tbl[]

			[UMC_V12_0_UMC_INSTANCE_NUM]

			[UMC_V12_0_CHANNEL_INSTANCE_NUM];



extern struct amdgpu_umc_ras umc_v12_0_ras;



#endif