Commit 3ac5fa3f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2023-10-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-next



- Add new DG2 PCI IDs (Shekhar)
- Remove watchdog timers for PSR on Lunar Lake (Mika Kahola)
- DSB changes for proper handling of LUT programming (Ville)
- Store DSC DPCD capabilities in the connector (Imre)
- Clean up zero initializers (Ville)
- Remove Meteor Lake force_probe protection (RK)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZTFW4g6duLtp+Wy0@intel.com
parents 27442758 213c4367
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ static acpi_handle intel_dsm_pci_probe(struct pci_dev *pdev)
static bool intel_dsm_detect(void)
{
	acpi_handle dhandle = NULL;
	char acpi_method_name[255] = { 0 };
	char acpi_method_name[255] = {};
	struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
	struct pci_dev *pdev = NULL;
	int vga_count = 0;
+0 −3
Original line number Diff line number Diff line
@@ -1895,9 +1895,6 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
	struct drm_i915_private *i915 = to_i915(crtc->base.dev);

	/* FIXME DSB has issues loading LUTs, disable it for now */
	return;

	if (!crtc_state->hw.active ||
	    intel_crtc_needs_modeset(crtc_state))
		return;
+1 −1
Original line number Diff line number Diff line
@@ -3009,7 +3009,7 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
	struct drm_i915_private *i915 = to_i915(state->base.dev);
	const struct intel_crtc_state *new_crtc_state =
		intel_atomic_get_new_crtc_state(state, crtc);
	struct intel_c10pll_state mpllb_hw_state = { 0 };
	struct intel_c10pll_state mpllb_hw_state = {};
	const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
	struct intel_encoder *encoder;
	enum phy phy;
+11 −11
Original line number Diff line number Diff line
@@ -1191,8 +1191,8 @@ DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);

static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
{
	struct drm_connector *connector = m->private;
	struct drm_device *dev = connector->dev;
	struct intel_connector *connector = to_intel_connector(m->private);
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
	struct drm_crtc *crtc;
	struct intel_dp *intel_dp;
	struct drm_modeset_acquire_ctx ctx;
@@ -1204,7 +1204,7 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)

	do {
		try_again = false;
		ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
		ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
				       &ctx);
		if (ret) {
			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
@@ -1213,8 +1213,8 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
			}
			break;
		}
		crtc = connector->state->crtc;
		if (connector->status != connector_status_connected || !crtc) {
		crtc = connector->base.state->crtc;
		if (connector->base.status != connector_status_connected || !crtc) {
			ret = -ENODEV;
			break;
		}
@@ -1229,24 +1229,24 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
		} else if (ret) {
			break;
		}
		intel_dp = intel_attached_dp(to_intel_connector(connector));
		intel_dp = intel_attached_dp(connector);
		crtc_state = to_intel_crtc_state(crtc->state);
		seq_printf(m, "DSC_Enabled: %s\n",
			   str_yes_no(crtc_state->dsc.compression_enable));
		seq_printf(m, "DSC_Sink_Support: %s\n",
			   str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));
			   str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
								      DP_DSC_RGB)),
			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
								      DP_DSC_YCbCr420_Native)),
			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
								      DP_DSC_YCbCr444)));
		seq_printf(m, "Force_DSC_Enable: %s\n",
			   str_yes_no(intel_dp->force_dsc_en));
		if (!intel_dp_is_edp(intel_dp))
			seq_printf(m, "FEC_Sink_Support: %s\n",
				   str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable)));
				   str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
	} while (try_again);

	drm_modeset_drop_locks(&ctx);
+6 −2
Original line number Diff line number Diff line
@@ -620,6 +620,12 @@ struct intel_connector {

	struct intel_dp *mst_port;

	struct {
		struct drm_dp_aux *dsc_decompression_aux;
		u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
		u8 fec_capability;
	} dp;

	/* Work struct to schedule a uevent on link train failure */
	struct work_struct modeset_retry_work;

@@ -1719,10 +1725,8 @@ struct intel_dp {
	u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
	u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
	u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
	u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
	u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
	u8 lttpr_phy_caps[DP_MAX_LTTPR_COUNT][DP_LTTPR_PHY_CAP_SIZE];
	u8 fec_capable;
	u8 pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE];
	/* source rates */
	int num_source_rates;
Loading