Commit 34cfebc0 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'juno-updates-5.10' of...

Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno/Vexpress/Fast Models updates for v5.10

A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.

* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Fix SP805 clock-names
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: arm: Fix SP804 users

Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 0630fe41 b83ded8a
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+1 −1
Original line number Diff line number Diff line
@@ -390,7 +390,7 @@ wdog: watchdog@10010000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x10010000 0x1000>;
			clocks = <&wdogclk>, <&pclk>;
			clock-names = "wdogclk", "apb_pclk";
			clock-names = "wdog_clk", "apb_pclk";
			status = "disabled";
		};

+10 −10
Original line number Diff line number Diff line
@@ -546,7 +546,7 @@ watchdog@1000f000 {
			interrupt-parent = <&intc_pb11mp>;
			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&wdogclk>, <&pclk>;
			clock-names = "wdogclk", "apb_pclk";
			clock-names = "wdog_clk", "apb_pclk";
			status = "disabled";
		};

@@ -556,7 +556,7 @@ watchdog@10010000 {
			interrupt-parent = <&intc_pb11mp>;
			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&wdogclk>, <&pclk>;
			clock-names = "wdogclk", "apb_pclk";
			clock-names = "wdog_clk", "apb_pclk";
		};

		timer01: timer@10011000 {
@@ -568,8 +568,8 @@ timer01: timer@10011000 {
			clocks = <&sp810_syscon 0>,
			         <&sp810_syscon 1>,
				 <&pclk>;
			clock-names = "timerclk0",
				    "timerclk1",
			clock-names = "timer0clk",
				    "timer1clk",
				    "apb_pclk";
		};

@@ -582,8 +582,8 @@ timer23: timer@10012000 {
			clocks = <&sp810_syscon 2>,
			         <&sp810_syscon 3>,
				 <&pclk>;
			clock-names = "timerclk2",
				    "timerclk3",
			clock-names = "timer0clk",
				    "timer1clk",
				    "apb_pclk";
		};

@@ -645,16 +645,16 @@ rtc: rtc@10017000 {
		timer45: timer@10018000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x10018000 0x1000>;
			clocks = <&timclk>, <&pclk>;
			clock-names = "timer", "apb_pclk";
			clocks = <&timclk>, <&timclk>, <&pclk>;
			clock-names = "timer0clk", "timer1clk", "apb_pclk";
			status = "disabled";
		};

		timer67: timer@10019000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x10019000 0x1000>;
			clocks = <&timclk>, <&pclk>;
			clock-names = "timer", "apb_pclk";
			clocks = <&timclk>, <&timclk>, <&pclk>;
			clock-names = "timer0clk", "timer1clk", "apb_pclk";
			status = "disabled";
		};

+2 −2
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ wdog0: watchdog@1000f000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x1000f000 0x1000>;
			clocks = <&wdogclk>, <&pclk>;
			clock-names = "wdogclk", "apb_pclk";
			clock-names = "wdog_clk", "apb_pclk";
			status = "disabled";
		};

@@ -389,7 +389,7 @@ wdog1: watchdog@10010000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x10010000 0x1000>;
			clocks = <&wdogclk>, <&pclk>;
			clock-names = "wdogclk", "apb_pclk";
			clock-names = "wdog_clk", "apb_pclk";
			status = "disabled";
		};

+6 −4
Original line number Diff line number Diff line
@@ -161,9 +161,11 @@ timer1: mps2-timer1@1000 {
			};

			timer2: dual-timer@2000 {
				compatible = "arm,sp804";
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x2000 0x1000>;
				clocks = <&sysclk>;
				clocks = <&sysclk>, <&sysclk>, <&sysclk>;
				clock-names = "timer0clk", "timer1clk",
					       "apb_pclk";
				interrupts = <10>;
				status = "disabled";
			};
@@ -197,8 +199,8 @@ wdt: watchdog@8000 {
				arm,primecell-periphid = <0x00141805>;
				reg = <0x8000 0x1000>;
				interrupts = <0>;
				clocks = <&sysclk>;
				clock-names = "apb_pclk";
				clocks = <&sysclk>, <&sysclk>;
				clock-names = "wdog_clk", "apb_pclk";
				status = "disabled";
			};
		};
+1 −1
Original line number Diff line number Diff line
@@ -280,7 +280,7 @@ wdt@f0000 {
					reg = <0x0f0000 0x1000>;
					interrupts = <0>;
					clocks = <&v2m_refclk32khz>, <&smbclk>;
					clock-names = "wdogclk", "apb_pclk";
					clock-names = "wdog_clk", "apb_pclk";
				};

				v2m_timer01: timer@110000 {
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