Commit 3319f148 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt 

ARM: DT: Hisilicon ARM32 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema including
  serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2
  builds.

* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: fix errors detected by syscon.yaml
  ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
  ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
  ARM: dts: hisilicon: fix errors detected by root-node.yaml
  ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
  ARM: dts: hisilicon: fix errors detected by usb yaml
  ARM: dts: hisilicon: fix errors detected by pl011.yaml
  ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml

Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c7cf6733 d48b6ef7

arch/arm/boot/dts/hi3519-demb.dts

+1 −1
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ aliases { 
		serial0 = &uart0;

	};



	memory {

	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x40000000>;

	};

arch/arm/boot/dts/hi3519.dtsi

+16 −16
Original line number Diff line number Diff line
@@ -52,8 +52,8 @@ uart0: serial@12100000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12100000 0x1000>;

			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_UART0_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disable";

		};
@@ -61,8 +61,8 @@ uart1: serial@12101000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12101000 0x1000>;

			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_UART1_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disable";

		};
@@ -70,8 +70,8 @@ uart2: serial@12102000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12102000 0x1000>;

			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_UART2_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disable";

		};
@@ -79,8 +79,8 @@ uart3: serial@12103000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12103000 0x1000>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_UART3_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disable";

		};
@@ -88,8 +88,8 @@ uart4: serial@12104000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12104000 0x1000>;

			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_UART4_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disable";

		};
@@ -127,8 +127,8 @@ spi_bus0: spi@12120000 { 
			compatible = "arm,pl022", "arm,primecell";

			reg = <0x12120000 0x1000>;

			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_SPI0_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;

			clock-names = "sspclk", "apb_pclk";

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;
@@ -139,8 +139,8 @@ spi_bus1: spi@12121000 { 
			compatible = "arm,pl022", "arm,primecell";

			reg = <0x12121000 0x1000>;

			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_SPI1_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;

			clock-names = "sspclk", "apb_pclk";

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;
@@ -151,8 +151,8 @@ spi_bus2: spi@12122000 { 
			compatible = "arm,pl022", "arm,primecell";

			reg = <0x12122000 0x1000>;

			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HI3519_SPI2_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;

			clock-names = "sspclk", "apb_pclk";

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

arch/arm/boot/dts/hi3620-hi4511.dts

+12 −12
Original line number Diff line number Diff line
@@ -17,46 +17,46 @@ chosen { 
		stdout-path = "serial0:115200n8";

	};



	memory {

	memory@40000000 {

		device_type = "memory";

		reg = <0x40000000 0x20000000>;

	};



	amba {

	amba-bus {

		dual_timer0: dual_timer@800000 {

			status = "ok";

		};



		uart0: uart@b00000 {	/* console */

			pinctrl-names = "default", "idle";

		uart0: serial@b00000 {	/* console */

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;

			pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;

			status = "ok";

		};



		uart1: uart@b01000 { /* modem */

			pinctrl-names = "default", "idle";

		uart1: serial@b01000 { /* modem */

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;

			pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;

			status = "ok";

		};



		uart2: uart@b02000 { /* audience */

			pinctrl-names = "default", "idle";

		uart2: serial@b02000 { /* audience */

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;

			pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;

			status = "ok";

		};



		uart3: uart@b03000 {

			pinctrl-names = "default", "idle";

		uart3: serial@b03000 {

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;

			pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;

			status = "ok";

		};



		uart4: uart@b04000 {

			pinctrl-names = "default", "idle";

		uart4: serial@b04000 {

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;

			pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;

			status = "ok";

arch/arm/boot/dts/hi3620.dtsi

+16 −16
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ cpu@3 { 
		};

	};



	amba {

	amba-bus {



		#address-cells = <1>;

		#size-cells = <1>;
@@ -172,48 +172,48 @@ timer5: timer@600 { 
			interrupts = <1 13 0xf01>;

		};



		uart0: uart@b00000 {

		uart0: serial@b00000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb00000 0x1000>;

			interrupts = <0 20 4>;

			clocks = <&clock HI3620_UARTCLK0>;

			clock-names = "apb_pclk";

			clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};



		uart1: uart@b01000 {

		uart1: serial@b01000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb01000 0x1000>;

			interrupts = <0 21 4>;

			clocks = <&clock HI3620_UARTCLK1>;

			clock-names = "apb_pclk";

			clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};



		uart2: uart@b02000 {

		uart2: serial@b02000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb02000 0x1000>;

			interrupts = <0 22 4>;

			clocks = <&clock HI3620_UARTCLK2>;

			clock-names = "apb_pclk";

			clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};



		uart3: uart@b03000 {

		uart3: serial@b03000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb03000 0x1000>;

			interrupts = <0 23 4>;

			clocks = <&clock HI3620_UARTCLK3>;

			clock-names = "apb_pclk";

			clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};



		uart4: uart@b04000 {

		uart4: serial@b04000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb04000 0x1000>;

			interrupts = <0 24 4>;

			clocks = <&clock HI3620_UARTCLK4>;

			clock-names = "apb_pclk";

			clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};

arch/arm/boot/dts/hip01-ca9x2.dts

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ cpu@1 { 
		};

	};



	memory {

	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x80000000>;

	};