Commit 32037156 authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo
Browse files

arm64: dts: imx8mp: Update i.MX8MP DHCOM SoM DT to production rev.200



The current imx8mp-dhcom-som.dtsi describes prototype rev.100 SoM,
update the DT to describe production rev.200 SoM which brings the
following changes:
- Fast SoC GPIOs exposed on the SoM edge connector
- Slow GPIOs like component resets moved to I2C GPIO expander
- ADC upgraded from TLA2024 to ADS1015 with conversion interrupt
- EEPROM size increased from 256 B to 4 kiB

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 686e25dd
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+90 −55
Original line number Diff line number Diff line
@@ -25,9 +25,7 @@ memory@40000000 {

	reg_eth_vio: regulator-eth-vio {
		compatible = "regulator-fixed";
		gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
		pinctrl-0 = <&pinctrl_enet_vio>;
		pinctrl-names = "default";
		gpio = <&ioexp 2 GPIO_ACTIVE_LOW>;
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
@@ -60,7 +58,7 @@ reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */

	wlan_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
		reset-gpios = <&ioexp 1 GPIO_ACTIVE_LOW>;
	};
};

@@ -117,7 +115,7 @@ ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */
			reg = <0>;
			reset-assert-us = <1000>;
			reset-deassert-us = <1000>;
			reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
			reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
			/* Non-default PHY population option. */
			status = "disabled";
		};
@@ -133,7 +131,7 @@ ethphy0g: ethernet-phy@5 { /* Micrel KSZ9131RNXI */
			reg = <5>;
			reset-assert-us = <1000>;
			reset-deassert-us = <1000>;
			reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
			reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
			/* Default PHY population option. */
			status = "okay";
		};
@@ -355,8 +353,9 @@ ldo5: LDO5 { /* NVCC_SD2 */
	};

	adc@48 {
		compatible = "ti,tla2024";
		compatible = "ti,ads1015";
		reg = <0x48>;
		interrupts-extended = <&ioexp 7 IRQ_TYPE_EDGE_FALLING>;
		#address-cells = <1>;
		#size-cells = <0>;

@@ -403,25 +402,42 @@ touchscreen@49 {
	};

	eeprom0: eeprom@50 {	/* EEPROM with EQoS MAC address */
		compatible = "atmel,24c02";
		pagesize = <16>;
		compatible = "atmel,24c32";	/* M24C32-D */
		pagesize = <32>;
		reg = <0x50>;
	};

	rv3032: rtc@51 {
		compatible = "microcrystal,rv3032";
		reg = <0x51>;
		interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc>;
		interrupts-extended = <&ioexp 3 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};

	eeprom1: eeprom@53 {	/* EEPROM with FEC MAC address */
		compatible = "atmel,24c02";
		pagesize = <16>;
		compatible = "atmel,24c32";	/* M24C32-D */
		pagesize = <32>;
		reg = <0x53>;
	};

	ioexp: gpio@74 {
		compatible = "nxp,pca9539";
		reg = <0x74>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ioexp>;
		wakeup-source;

		gpio-line-names =
			"BT_REG_EN", "WL_REG_EN", "VIO_SWITCHED_#EN", "RTC_#INT",
			"ENET_QOS_#RST", "RGB_OSZ_ENABLE", "USB1_ID", "ADC_ALTER_RDY",
			"DHCOM-W", "DHCOM-V", "DHCOM-U", "DHCOM-T",
			"BT_HOST_WAKE", "BT_DEV_WAKE", "", "";
	};
};

&i2c4 {
@@ -493,10 +509,8 @@ &uart2 {
	assigned-clock-rates = <80000000>;

	bluetooth {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart2_bt>;
		compatible = "cypress,cyw4373a0-bt";
		shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		shutdown-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>;
		max-speed = <4000000>;
	};
};
@@ -523,8 +537,6 @@ &usb3_0 {
};

&usb_dwc3_0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb0_vbus>;
	dr_mode = "otg";
	status = "okay";
};
@@ -610,8 +622,9 @@ &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
		     &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
		     &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i
		     &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
		     /* GPIO_M is connected to CLKOUT1 */
		     &pinctrl_dhcom_int>;
		     &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
		     &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
		     &pinctrl_dhcom_s &pinctrl_dhcom_int>;
	pinctrl-names = "default";

	pinctrl_dhcom_a: dhcom-a-grp {
@@ -698,6 +711,55 @@ MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x2
		>;
	};

	pinctrl_dhcom_m: dhcom-m-grp {
		fsl,pins = <
			/* CSIx_MCLK */
			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x2
		>;
	};

	pinctrl_dhcom_n: dhcom-n-grp {
		fsl,pins = <
			/* CSI2_D3- */
			MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09		0x2
		>;
	};

	pinctrl_dhcom_o: dhcom-o-grp {
		fsl,pins = <
			/* CSI2_D3+ */
			MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08		0x2
		>;
	};

	pinctrl_dhcom_p: dhcom-p-grp {
		fsl,pins = <
			/* CSI2_D2- */
			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x2
		>;
	};

	pinctrl_dhcom_q: dhcom-q-grp {
		fsl,pins = <
			/* CSI2_D2+ */
			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x2
		>;
	};

	pinctrl_dhcom_r: dhcom-r-grp {
		fsl,pins = <
			/* CSI2_D1- */
			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x2
		>;
	};

	pinctrl_dhcom_s: dhcom-s-grp {
		fsl,pins = <
			/* CSI2_D1+ */
			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x2
		>;
	};

	pinctrl_dhcom_int: dhcom-int-grp {
		fsl,pins = <
			/* INT_HIGHEST_PRIO */
@@ -771,16 +833,8 @@ MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK 0x4000001f
		>;
	};

	pinctrl_enet_vio: dhcom-enet-vio-grp {
		fsl,pins = <
			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x22
		>;
	};

	pinctrl_ethphy0: dhcom-ethphy0-grp {
		fsl,pins = <
			/* ENET_QOS_#RST Reset */
			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x22
			/* ENET_QOS_#INT Interrupt */
			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x22
		>;
@@ -906,6 +960,13 @@ MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27 0x84
		>;
	};

	pinctrl_ioexp: dhcom-ioexp-grp {
		fsl,pins = <
			/* #GPIO_EXP_INT */
			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x22
		>;
	};

	pinctrl_pmic: dhcom-pmic-grp {
		fsl,pins = <
			/* PMIC_nINT */
@@ -919,13 +980,6 @@ MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x6
		>;
	};

	pinctrl_rtc: dhcom-rtc-grp {
		fsl,pins = <
			/* RTC_#INT Interrupt */
			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x40000080
		>;
	};

	pinctrl_tc9595: dhcom-tc9595-grp {
		fsl,pins = <
			/* RESET_DSIBRIDGE */
@@ -971,13 +1025,6 @@ MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x49
		>;
	};

	pinctrl_uart2_bt: dhcom-uart2-bt-grp {
		fsl,pins = <
			/* BT_REG_EN */
			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x144
		>;
	};

	pinctrl_uart3: dhcom-uart3-grp {
		fsl,pins = <
			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x49
@@ -994,12 +1041,6 @@ MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x49
		>;
	};

	pinctrl_usb0_vbus: dhcom-usb0-grp {
		fsl,pins = <
			MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID		0x0
		>;
	};

	pinctrl_usb1_vbus: dhcom-usb1-grp {
		fsl,pins = <
			MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR		0x6
@@ -1015,8 +1056,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d0
			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d0
			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d0
			/* WL_REG_EN */
			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x144
		>;
	};

@@ -1028,8 +1067,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d4
			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d4
			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d4
			/* WL_REG_EN */
			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x144
		>;
	};

@@ -1041,8 +1078,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d6
			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d6
			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d6
			/* WL_REG_EN */
			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x144
		>;
	};