Commit 32004ee4 authored by Wey-Yi Guy's avatar Wey-Yi Guy Committed by John W. Linville
Browse files

iwlwifi: set auto clock gate disable bit for 6x00/6x50 series 



For 6x00 and 6x50 series NIC with OTP shadow RAM, set auto clock gate
disable bit when initializing OTP access.

Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 8d9698b3

drivers/net/wireless/iwlwifi/iwl-csr.h

+4 −2
Original line number Diff line number Diff line
@@ -111,6 +111,7 @@ 
 */

#define CSR_HW_REV_WA_REG		(CSR_BASE+0x22C)

#define CSR_DBG_HPET_MEM_REG		(CSR_BASE+0x240)

#define CSR_DBG_LINK_PWR_MGMT_REG	(CSR_BASE+0x250)



/* Bits for CSR_HW_IF_CONFIG_REG */

#define CSR49_HW_IF_CONFIG_REG_BIT_4965_R	(0x00000010)
@@ -195,6 +196,7 @@ 
#define CSR_RESET_REG_FLAG_SW_RESET                  (0x00000080)

#define CSR_RESET_REG_FLAG_MASTER_DISABLED           (0x00000100)

#define CSR_RESET_REG_FLAG_STOP_MASTER               (0x00000200)

#define CSR_RESET_LINK_PWR_MGMT_DISABLED             (0x80000000)



/* GP (general purpose) CONTROL */

#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY        (0x00000001)

drivers/net/wireless/iwlwifi/iwl-eeprom.c

+8 −0
Original line number Diff line number Diff line
@@ -358,6 +358,14 @@ static int iwl_init_otp_access(struct iwl_priv *priv) 
		udelay(5);

		iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,

				    APMG_PS_CTRL_VAL_RESET_REQ);



		/*

		 * CSR auto clock gate disable bit -

		 * this is only applicable for HW with OTP shadow RAM

		 */

		if (priv->cfg->shadow_ram_support)

			iwl_set_bit(priv, CSR_DBG_LINK_PWR_MGMT_REG,

				CSR_RESET_LINK_PWR_MGMT_DISABLED);

	}

	return ret;

}