Commit 30c50d3a authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/meson' 

  - Fix meson PERST# GPIO polarity problem (Remi Pommarel)

  - Add DT bindings for Amlogic Meson G12A (Neil Armstrong)

  - Fix meson clock names to match DT bindings (Neil Armstrong)

  - Add meson support for Amlogic G12A SoC with separate shared PHY (Neil
    Armstrong)

  - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe combo
    PHY (Neil Armstrong)

  - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong)

  - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT (Neil
    Armstrong)

* remotes/lorenzo/pci/meson:
  arm64: dts: khadas-vim3: add commented support for PCIe
  arm64: dts: meson-g12a: Add PCIe node
  phy: meson-g12a-usb3-pcie: Add support for PCIe mode
  PCI: amlogic: meson: Add support for G12A
  PCI: amlogic: Fix probed clock names
  dt-bindings: pci: amlogic, meson-pcie: Add G12A bindings
  PCI: amlogic: Fix reset assertion via gpio descriptor
parents e63758e2 ba1f8af7

Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt

+8 −4
Original line number Diff line number Diff line
@@ -9,13 +9,16 @@ Additional properties are described here: 


Required properties:

- compatible:

	should contain "amlogic,axg-pcie" to identify the core.

	should contain :

	- "amlogic,axg-pcie" for AXG SoC Family

	- "amlogic,g12a-pcie" for G12A SoC Family

	to identify the core.

- reg:

	should contain the configuration address space.

- reg-names: Must be

	- "elbi"	External local bus interface registers

	- "cfg"		Meson specific registers

	- "phy"		Meson PCIE PHY registers

	- "phy"		Meson PCIE PHY registers for AXG SoC Family

	- "config"	PCIe configuration space

- reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.

- clocks: Must contain an entry for each entry in clock-names.
@@ -23,12 +26,13 @@ Required properties: 
	- "pclk"       PCIe GEN 100M PLL clock

	- "port"       PCIe_x(A or B) RC clock gate

	- "general"    PCIe Phy clock

	- "mipi"       PCIe_x(A or B) 100M ref clock gate

	- "mipi"       PCIe_x(A or B) 100M ref clock gate for AXG SoC Family

- resets: phandle to the reset lines.

- reset-names: must contain "phy" "port" and "apb"

       - "phy"         Share PHY reset

       - "phy"         Share PHY reset for AXG SoC Family

       - "port"        Port A or B reset

       - "apb"         Share APB reset

- phys: should contain a phandle to the shared phy for G12A SoC Family

- device_type:

	should be "pci". As specified in designware-pcie.txt

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -95,6 +95,39 @@ soc { 
		#size-cells = <2>;

		ranges;



		pcie: pcie@fc000000 {

			compatible = "amlogic,g12a-pcie", "snps,dw-pcie";

			reg = <0x0 0xfc000000 0x0 0x400000

			       0x0 0xff648000 0x0 0x2000

			       0x0 0xfc400000 0x0 0x200000>;

			reg-names = "elbi", "cfg", "config";

			interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;

			bus-range = <0x0 0xff>;

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000

				  0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;



			clocks = <&clkc CLKID_PCIE_PHY

				  &clkc CLKID_PCIE_COMB

				  &clkc CLKID_PCIE_PLL>;

			clock-names = "general",

				      "pclk",

				      "port";

			resets = <&reset RESET_PCIE_CTRL_A>,

				 <&reset RESET_PCIE_APB>;

			reset-names = "port",

				      "apb";

			num-lanes = <1>;

			phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;

			phy-names = "pcie";

			status = "disabled";

		};



		ethmac: ethernet@ff3f0000 {

			compatible = "amlogic,meson-axg-dwmac",

				     "snps,dwmac-3.70a",

arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts

+25 −0
Original line number Diff line number Diff line
@@ -14,3 +14,28 @@ 
/ {

	compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";

};



/*

 * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential

 * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between

 * an USB3.0 Type A connector and a M.2 Key M slot.

 * The PHY driving these differential lines is shared between

 * the USB3.0 controller and the PCIe Controller, thus only

 * a single controller can use it.

 * If the MCU is configured to mux the PCIe/USB3.0 differential lines

 * to the M.2 Key M slot, uncomment the following block to disable

 * USB3.0 from the USB Complex and enable the PCIe controller.

 * The End User is not expected to uncomment the following except for

 * testing purposes, but instead rely on the firmware/bootloader to

 * update these nodes accordingly if PCIe mode is selected by the MCU.

 */

/*

&pcie {

	status = "okay";

};



&usb {

	phys = <&usb2_phy0>, <&usb2_phy1>;

	phy-names = "usb2-phy0", "usb2-phy1";

};

 */

arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts

+25 −0
Original line number Diff line number Diff line
@@ -14,3 +14,28 @@ 
/ {

	compatible = "khadas,vim3", "amlogic,s922x", "amlogic,g12b";

};



/*

 * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential

 * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between

 * an USB3.0 Type A connector and a M.2 Key M slot.

 * The PHY driving these differential lines is shared between

 * the USB3.0 controller and the PCIe Controller, thus only

 * a single controller can use it.

 * If the MCU is configured to mux the PCIe/USB3.0 differential lines

 * to the M.2 Key M slot, uncomment the following block to disable

 * USB3.0 from the USB Complex and enable the PCIe controller.

 * The End User is not expected to uncomment the following except for

 * testing purposes, but instead rely on the firmware/bootloader to

 * update these nodes accordingly if PCIe mode is selected by the MCU.

 */

/*

&pcie {

	status = "okay";

};



&usb {

	phys = <&usb2_phy0>, <&usb2_phy1>;

	phy-names = "usb2-phy0", "usb2-phy1";

};

 */

arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -246,6 +246,10 @@ &ir { 
	linux,rc-map-name = "rc-khadas";

};



&pcie {

	reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;

};



&pwm_ef {

        status = "okay";

        pinctrl-0 = <&pwm_e_pins>;