Commit 2daaf5b0 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nve0/fb/gddr5: fix behaviour of lp3 setting 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent cb1567c2

drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c

+3 −0
Original line number Diff line number Diff line
@@ -78,6 +78,9 @@ nouveau_gddr5_calc(struct nouveau_ram *ram) 
	ram->mr[3] &= ~0x020;

	ram->mr[3] |= (rq & 0x01) << 5;



	/*XXX: LP3, where's the bit?  Let's hardcode to off for now */

	ram->mr[5] &= ~0x004;



	if (!vo)

		vo = (ram->mr[6] & 0xff0) >> 4;

	if (ram->mr[6] & 0x001)

drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c

+2 −2
Original line number Diff line number Diff line
@@ -528,7 +528,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq) 
	ram_mask(fuc, mr[8], 0xfff, ram->base.mr[8]);

	ram_nsec(fuc, 1000);

	ram_mask(fuc, mr[1], 0xfff, ram->base.mr[1]);

	ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);

	ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5] & ~0x004); /* LP3 later */

	ram_mask(fuc, mr[6], 0xfff, ram->base.mr[6]);

	ram_mask(fuc, mr[7], 0xfff, ram->base.mr[7]);
@@ -582,7 +582,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq) 
	/* MR5: (re)enable LP3 if necessary

	 * XXX: need to find the switch, keeping off for now

	 */

	ram_mask(fuc, mr[5], 0x00000004, 0x00000000);

	ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);



	if (ram->mode != 2) {

		ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000);