Commit 26093ce1 authored by Stanley.Yang's avatar Stanley.Yang Committed by Alex Deucher
Browse files

drm/amdgpu: Only send ras feature for gfx block 



GFX is the only IP block that RAS TA needs to program
the hardware when receiving enable_feature command.

Changed from V1:
    remove amdgpu_ras_need_send_ras_feature inline function,
    use GFX RAS block check directly.

Signed-off-by: default avatarStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cbe07c98

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+20 −16
Original line number Diff line number Diff line
@@ -717,6 +717,7 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev, 
	if (!con)

		return -EINVAL;



	if (head->block == AMDGPU_RAS_BLOCK__GFX) {

		info = kzalloc(sizeof(union ta_ras_cmd_input), GFP_KERNEL);

		if (!info)

			return -ENOMEM;
@@ -732,12 +733,14 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev, 
				.error_type = amdgpu_ras_error_to_ta(head->type),

			};

		}

	}



	/* Do not enable if it is not allowed. */

	WARN_ON(enable && !amdgpu_ras_is_feature_allowed(adev, head));



	/* Only enable ras feature operation handle on host side */

	if (!amdgpu_sriov_vf(adev) &&

	if (head->block == AMDGPU_RAS_BLOCK__GFX &&

		!amdgpu_sriov_vf(adev) &&

		!amdgpu_ras_intr_triggered()) {

		ret = psp_ras_enable_features(&adev->psp, info, enable);

		if (ret) {
@@ -753,6 +756,7 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev, 
	__amdgpu_ras_feature_enable(adev, head, enable);

	ret = 0;

out:

	if (head->block == AMDGPU_RAS_BLOCK__GFX)

		kfree(info);

	return ret;

}