Commit 22f969f3 authored by Scott Branden's avatar Scott Branden Committed by Florian Fainelli
Browse files

arm64: dts: stingray: move common board components to stingray-board-base



Move common board components from base bcm958742 dtsi file to new
stingray-board-base dtsi file so they can be shared between many stingray
boards following common design.

Signed-off-by: default avatarScott Branden <scott.branden@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent ce397d21
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+1 −34
Original line number Diff line number Diff line
@@ -30,20 +30,9 @@
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "stingray.dtsi"
#include "stingray-board-base.dtsi"

/ {
	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		serial0 = &uart1;
		serial1 = &uart0;
		serial2 = &uart2;
		serial3 = &uart3;
	};

	sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
		compatible = "regulator-gpio";
		regulator-name = "sdio0_vddo_ctrl_reg";
@@ -67,11 +56,6 @@ sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl {
	};
};

&memory { /* Default DRAM banks */
	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
};

&sata0 {
	status = "okay";
};
@@ -136,18 +120,6 @@ &sata_phy7{
	status = "okay";
};

&mdio_mux_iproc {
	mdio@10 {
		gphy0: eth-phy@10 {
			reg = <0x10>;
		};
	};
};

&uart1 {
	status = "okay";
};

&pwm {
	status = "okay";
};
@@ -175,8 +147,6 @@ pcf8574: pcf8574@20 {
};

&enet {
	phy-mode = "rgmii-id";
	phy-handle = <&gphy0>;
	status = "okay";
};

@@ -197,13 +167,10 @@ nandcs@0 {

&sdio0 {
	vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
	non-removable;
	full-pwr-cycle;
	status = "okay";
};

&sdio1 {
	vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
	full-pwr-cycle;
	status = "okay";
};
+51 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)
/*
 *  Copyright(c) 2016-2018 Broadcom
 */

#include "stingray.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		serial0 = &uart1;
		serial1 = &uart0;
		serial2 = &uart2;
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&memory { /* Default DRAM banks */
	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
};

&enet {
	phy-mode = "rgmii-id";
	phy-handle = <&gphy0>;
};

&uart1 {
	status = "okay";
};

&sdio0 {
	non-removable;
	full-pwr-cycle;
};

&sdio1 {
	full-pwr-cycle;
};

&mdio_mux_iproc {
	mdio@10 {
		gphy0: eth-phy@10 {
			reg = <0x10>;
		};
	};
};