Commit 219aada2 authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915/guc: Convert golden context init to iosys_map 



Now the map is saved during creation, so use it to initialize the
golden context, reading from shmem and writing to either system or IO
memory.

v2: Do not use a map iterator: add an offset to keep track of
destination

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220216174147.3073235-7-lucas.demarchi@intel.com
parent 91a33f7e

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

+12 −14
Original line number Diff line number Diff line
@@ -512,18 +512,16 @@ static struct intel_engine_cs *find_engine_state(struct intel_gt *gt, u8 engine_ 


static void guc_init_golden_context(struct intel_guc *guc)

{

	struct __guc_ads_blob *blob = guc->ads_blob;

	struct intel_engine_cs *engine;

	struct intel_gt *gt = guc_to_gt(guc);

	u32 addr_ggtt, offset;

	u32 total_size = 0, alloc_size, real_size;

	unsigned long offset;

	u32 addr_ggtt, total_size = 0, alloc_size, real_size;

	u8 engine_class, guc_class;

	u8 *ptr;



	if (!intel_uc_uses_guc_submission(&gt->uc))

		return;



	GEM_BUG_ON(!blob);

	GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));



	/*

	 * Go back and fill in the golden context data now that it is
@@ -531,15 +529,13 @@ static void guc_init_golden_context(struct intel_guc *guc) 
	 */

	offset = guc_ads_golden_ctxt_offset(guc);

	addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

	ptr = ((u8 *)blob) + offset;



	for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {

		if (engine_class == OTHER_CLASS)

			continue;



		guc_class = engine_class_to_guc_class(engine_class);



		if (!blob->system_info.engine_enabled_masks[guc_class])

		if (!ads_blob_read(guc, system_info.engine_enabled_masks[guc_class]))

			continue;



		real_size = intel_engine_context_size(gt, engine_class);
@@ -550,18 +546,20 @@ static void guc_init_golden_context(struct intel_guc *guc) 
		if (!engine) {

			drm_err(&gt->i915->drm, "No engine state recorded for class %d!\n",

				engine_class);

			blob->ads.eng_state_size[guc_class] = 0;

			blob->ads.golden_context_lrca[guc_class] = 0;

			ads_blob_write(guc, ads.eng_state_size[guc_class], 0);

			ads_blob_write(guc, ads.golden_context_lrca[guc_class], 0);

			continue;

		}



		GEM_BUG_ON(blob->ads.eng_state_size[guc_class] !=

		GEM_BUG_ON(ads_blob_read(guc, ads.eng_state_size[guc_class]) !=

			   real_size - LRC_SKIP_SIZE);

		GEM_BUG_ON(blob->ads.golden_context_lrca[guc_class] != addr_ggtt);

		GEM_BUG_ON(ads_blob_read(guc, ads.golden_context_lrca[guc_class]) != addr_ggtt);



		addr_ggtt += alloc_size;



		shmem_read(engine->default_state, 0, ptr, real_size);

		ptr += alloc_size;

		shmem_read_to_iosys_map(engine->default_state, 0, &guc->ads_map,

					offset, real_size);

		offset += alloc_size;

	}



	GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);