Commit 1d826d14 authored by Jaecheol Lee's avatar Jaecheol Lee Committed by Kukjin Kim
Browse files

ARM: S5PV210: Add DMC map_desc table for supporting DMC access 



This patch adds DMC(DRAM Memory Controller) map_desc table.
Because some driver such as CPUFREQ need to access DMC register.

Signed-off-by: default avatarJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 2a555582

arch/arm/mach-s5pv210/cpu.c

+10 −0
Original line number Diff line number Diff line
@@ -85,6 +85,16 @@ static struct map_desc s5pv210_iodesc[] __initdata = { 
		.pfn		= __phys_to_pfn(S5PV210_PA_SROMC),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_DMC0,

		.pfn		= __phys_to_pfn(S5PV210_PA_DMC0),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_DMC1,

		.pfn		= __phys_to_pfn(S5PV210_PA_DMC1),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}

};

arch/arm/mach-s5pv210/include/mach/map.h

+3 −0
Original line number Diff line number Diff line
@@ -96,6 +96,9 @@ 


#define S5PV210_PA_ADC		(0xE1700000)



#define S5PV210_PA_DMC0		(0xF0000000)

#define S5PV210_PA_DMC1		(0xF1400000)



/* compatibiltiy defines. */

#define S3C_PA_UART		S5PV210_PA_UART

#define S3C_PA_HSMMC0		S5PV210_PA_HSMMC(0)

arch/arm/plat-s5p/include/plat/map-s5p.h

+2 −0
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ 
#define S5P_VA_SYSTIMER		S3C_ADDR(0x01200000)

#define S5P_VA_SROMC		S3C_ADDR(0x01100000)

#define S5P_VA_SYSRAM		S3C_ADDR(0x01180000)

#define S5P_VA_DMC0		S3C_ADDR(0x00A00000)

#define S5P_VA_DMC1		S3C_ADDR(0x00A80000)



#define S5P_VA_COMBINER_BASE	S3C_ADDR(0x00600000)

#define S5P_VA_COMBINER(x)	(S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)