Commit 1d076e5b authored by Tejun Heo's avatar Tejun Heo Committed by Jeff Garzik
Browse files

[PATCH] ata_piix: finer-grained port_info 



Make port_info finer-grained.  This patch doesn't cause any functional
change.  Later init reimplementation will make use of it.

Signed-off-by: default avatarTejun Heo <htejun@gmail.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 597afd21

drivers/scsi/ata_piix.c

+58 −19
Original line number Diff line number Diff line
@@ -119,11 +119,14 @@ enum { 
	PIIX_80C_PRI		= (1 << 5) | (1 << 4),

	PIIX_80C_SEC		= (1 << 7) | (1 << 6),



	ich5_pata		= 0,

	ich5_sata		= 1,

	piix4_pata		= 2,

	ich6_sata		= 3,

	ich6_sata_ahci		= 4,

	/* controller IDs */

	piix4_pata		= 0,

	ich5_pata		= 1,

	ich5_sata		= 2,

	esb_sata		= 3,

	ich6_sata		= 4,

	ich6_sata_ahci		= 5,

	ich6m_sata_ahci		= 6,



	PIIX_AHCI_DEVICE	= 6,

};
@@ -149,19 +152,32 @@ static const struct pci_device_id piix_pci_tbl[] = { 
	 * list in drivers/pci/quirks.c.

	 */



	/* 82801EB (ICH5) */

	{ 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },

	/* 82801EB (ICH5) */

	{ 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },

	{ 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },

	{ 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },

	/* 6300ESB (ICH5 variant with broken PCS present bits) */

	{ 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata },

	/* 6300ESB pretending RAID */

	{ 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata },

	/* 82801FB/FW (ICH6/ICH6W) */

	{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },

	/* 82801FR/FRW (ICH6R/ICH6RW) */

	{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented) */

	{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },

	/* 82801GB/GR/GH (ICH7, identical to ICH6) */

	{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	/* 2801GBM/GHM (ICH7M, identical to ICH6M) */

	{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },

	/* Enterprise Southbridge 2 (where's the datasheet?) */

	{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	/* SATA Controller 1 IDE (ICH8, no datasheet yet) */

	{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	/* SATA Controller 2 IDE (ICH8, ditto) */

	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },

	/* Mobile SATA Controller IDE (ICH8M, ditto) */

	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },



	{ }	/* terminate list */

};
@@ -255,6 +271,20 @@ static const struct ata_port_operations piix_sata_ops = { 
};



static struct ata_port_info piix_port_info[] = {

	/* piix4_pata */

	{

		.sht		= &piix_sht,

		.host_flags	= ATA_FLAG_SLAVE_POSS,

		.pio_mask	= 0x1f,	/* pio0-4 */

#if 0

		.mwdma_mask	= 0x06, /* mwdma1-2 */

#else

		.mwdma_mask	= 0x00, /* mwdma broken */

#endif

		.udma_mask	= ATA_UDMA_MASK_40C,

		.port_ops	= &piix_pata_ops,

	},



	/* ich5_pata */

	{

		.sht		= &piix_sht,
@@ -280,18 +310,15 @@ static struct ata_port_info piix_port_info[] = { 
		.port_ops	= &piix_sata_ops,

	},



	/* piix4_pata */

	/* i6300esb_sata */

	{

		.sht		= &piix_sht,

		.host_flags	= ATA_FLAG_SLAVE_POSS,

		.host_flags	= ATA_FLAG_SATA | PIIX_FLAG_COMBINED |

				  PIIX_FLAG_CHECKINTR,

		.pio_mask	= 0x1f,	/* pio0-4 */

#if 0

		.mwdma_mask	= 0x06, /* mwdma1-2 */

#else

		.mwdma_mask	= 0x00, /* mwdma broken */

#endif

		.udma_mask	= ATA_UDMA_MASK_40C,

		.port_ops	= &piix_pata_ops,

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.port_ops	= &piix_sata_ops,

	},



	/* ich6_sata */
@@ -316,6 +343,18 @@ static struct ata_port_info piix_port_info[] = { 
		.udma_mask	= 0x7f,	/* udma0-6 */

		.port_ops	= &piix_sata_ops,

	},



	/* ich6m_sata_ahci */

	{

		.sht		= &piix_sht,

		.host_flags	= ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 |

				  PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS |

				  PIIX_FLAG_AHCI,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.port_ops	= &piix_sata_ops,

	},

};



static struct pci_bits piix_enable_bits[] = {