Commit 1330875d authored by Peter Geis's avatar Peter Geis Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: add rk3568 tsadc nodes 



Add the thermal and tsadc nodes to the rk3568 device tree.
There are two sensors, one for the cpu, one for the gpu.

Signed-off-by: default avatarPeter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-6-pgwipeout@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 3d9170c3

arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -3108,4 +3108,13 @@ gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 { 
				<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;

		};

	};



	tsadc {

		/omit-if-no-ref/

		tsadc_pin: tsadc-pin {

			rockchip,pins =

				/* tsadc_pin */

				<0 RK_PA1 0 &pcfg_pull_none>;

		};

	};

};

arch/arm64/boot/dts/rockchip/rk356x.dtsi

+70 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ cpu0: cpu@0 { 
			compatible = "arm,cortex-a55";

			reg = <0x0 0x0>;

			clocks = <&scmi_clk 0>;

			#cooling-cells = <2>;

			enable-method = "psci";

			operating-points-v2 = <&cpu0_opp_table>;

		};
@@ -58,6 +59,7 @@ cpu1: cpu@100 { 
			device_type = "cpu";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x100>;

			#cooling-cells = <2>;

			enable-method = "psci";

			operating-points-v2 = <&cpu0_opp_table>;

		};
@@ -66,6 +68,7 @@ cpu2: cpu@200 { 
			device_type = "cpu";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x200>;

			#cooling-cells = <2>;

			enable-method = "psci";

			operating-points-v2 = <&cpu0_opp_table>;

		};
@@ -74,6 +77,7 @@ cpu3: cpu@300 { 
			device_type = "cpu";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x300>;

			#cooling-cells = <2>;

			enable-method = "psci";

			operating-points-v2 = <&cpu0_opp_table>;

		};
@@ -780,6 +784,72 @@ uart9: serial@fe6d0000 { 
		status = "disabled";

	};



	thermal_zones: thermal-zones {

		cpu_thermal: cpu-thermal {

			polling-delay-passive = <100>;

			polling-delay = <1000>;



			thermal-sensors = <&tsadc 0>;



			trips {

				cpu_alert0: cpu_alert0 {

					temperature = <70000>;

					hysteresis = <2000>;

					type = "passive";

				};

				cpu_alert1: cpu_alert1 {

					temperature = <75000>;

					hysteresis = <2000>;

					type = "passive";

				};

				cpu_crit: cpu_crit {

					temperature = <95000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert0>;

					cooling-device =

						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



		gpu_thermal: gpu-thermal {

			polling-delay-passive = <20>; /* milliseconds */

			polling-delay = <1000>; /* milliseconds */



			thermal-sensors = <&tsadc 1>;

		};

	};



	tsadc: tsadc@fe710000 {

		compatible = "rockchip,rk3568-tsadc";

		reg = <0x0 0xfe710000 0x0 0x100>;

		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;

		assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>;

		assigned-clock-rates = <17000000>, <700000>;

		clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;

		clock-names = "tsadc", "apb_pclk";

		resets = <&cru SRST_TSADC>, <&cru SRST_P_TSADC>,

			 <&cru SRST_TSADCPHY>;

		reset-names = "tsadc", "tsadc-apb", "tsadc-phy";

		rockchip,grf = <&grf>;

		rockchip,hw-tshut-temp = <95000>;

		pinctrl-names = "init", "default", "sleep";

		pinctrl-0 = <&tsadc_pin>;

		pinctrl-1 = <&tsadc_shutorg>;

		pinctrl-2 = <&tsadc_pin>;

		#thermal-sensor-cells = <1>;

		status = "disabled";

	};



	saradc: saradc@fe720000 {

		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";

		reg = <0x0 0xfe720000 0x0 0x100>;