Loading drivers/gpu/drm/nouveau/include/nvif/class.h +8 −3 Original line number Diff line number Diff line #ifndef __NVIF_CLASS_H__ #define __NVIF_CLASS_H__ /******************************************************************************* * class identifiers ******************************************************************************/ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_SW_NV04 -4 #define NVIF_CLASS_SW_NV10 -5 #define NVIF_CLASS_SW_NV50 -6 #define NVIF_CLASS_SW_GF100 -7 /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 Loading drivers/gpu/drm/nouveau/include/nvif/ioctl.h +0 −8 Original line number Diff line number Diff line Loading @@ -55,14 +55,6 @@ struct nvif_ioctl_new_v0 { __u64 token; __u64 object; __u32 handle; /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_IOCTL_NEW_V0_CONTROL -1 #define NVIF_IOCTL_NEW_V0_PERFMON -2 #define NVIF_IOCTL_NEW_V0_PERFDOM -3 #define NVIF_IOCTL_NEW_V0_SW_NV04 -4 #define NVIF_IOCTL_NEW_V0_SW_NV10 -5 #define NVIF_IOCTL_NEW_V0_SW_NV50 -6 #define NVIF_IOCTL_NEW_V0_SW_GF100 -7 __s32 oclass; __u8 data[]; /* class data (class.h) */ }; Loading drivers/gpu/drm/nouveau/nouveau_abi16.c +8 −8 Original line number Diff line number Diff line Loading @@ -87,18 +87,18 @@ nouveau_abi16_swclass(struct nouveau_drm *drm) { switch (drm->device.info.family) { case NV_DEVICE_INFO_V0_TNT: return NVIF_IOCTL_NEW_V0_SW_NV04; return NVIF_CLASS_SW_NV04; case NV_DEVICE_INFO_V0_CELSIUS: case NV_DEVICE_INFO_V0_KELVIN: case NV_DEVICE_INFO_V0_RANKINE: case NV_DEVICE_INFO_V0_CURIE: return NVIF_IOCTL_NEW_V0_SW_NV10; return NVIF_CLASS_SW_NV10; case NV_DEVICE_INFO_V0_TESLA: return NVIF_IOCTL_NEW_V0_SW_NV50; return NVIF_CLASS_SW_NV50; case NV_DEVICE_INFO_V0_FERMI: case NV_DEVICE_INFO_V0_KEPLER: case NV_DEVICE_INFO_V0_MAXWELL: return NVIF_IOCTL_NEW_V0_SW_GF100; return NVIF_CLASS_SW_GF100; } return 0x0000; Loading Loading @@ -433,10 +433,10 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS) /* nvsw: compatibility with older 0x*6e class identifier */ for (i = 0; !oclass && i < ret; i++) { switch (sclass[i].oclass) { case NVIF_IOCTL_NEW_V0_SW_NV04: case NVIF_IOCTL_NEW_V0_SW_NV10: case NVIF_IOCTL_NEW_V0_SW_NV50: case NVIF_IOCTL_NEW_V0_SW_GF100: case NVIF_CLASS_SW_NV04: case NVIF_CLASS_SW_NV10: case NVIF_CLASS_SW_NV50: case NVIF_CLASS_SW_GF100: oclass = sclass[i].oclass; break; default: Loading drivers/gpu/drm/nouveau/nouveau_chan.c +1 −1 Original line number Diff line number Diff line Loading @@ -378,7 +378,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) /* allocate software object class (used for fences on <= nv05) */ if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { ret = nvif_object_init(&chan->user, 0x006e, NVIF_IOCTL_NEW_V0_SW_NV04, NVIF_CLASS_SW_NV04, NULL, 0, &chan->nvsw); if (ret) return ret; Loading drivers/gpu/drm/nouveau/nouveau_sysfs.c +1 −1 Original line number Diff line number Diff line Loading @@ -188,7 +188,7 @@ nouveau_sysfs_init(struct drm_device *dev) if (!sysfs) return -ENOMEM; ret = nvif_object_init(&device->object, 0, NVIF_IOCTL_NEW_V0_CONTROL, ret = nvif_object_init(&device->object, 0, NVIF_CLASS_CONTROL, NULL, 0, &sysfs->ctrl); if (ret == 0) device_create_file(nvxx_device(device)->dev, &dev_attr_pstate); Loading Loading
drivers/gpu/drm/nouveau/include/nvif/class.h +8 −3 Original line number Diff line number Diff line #ifndef __NVIF_CLASS_H__ #define __NVIF_CLASS_H__ /******************************************************************************* * class identifiers ******************************************************************************/ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_SW_NV04 -4 #define NVIF_CLASS_SW_NV10 -5 #define NVIF_CLASS_SW_NV50 -6 #define NVIF_CLASS_SW_GF100 -7 /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 Loading
drivers/gpu/drm/nouveau/include/nvif/ioctl.h +0 −8 Original line number Diff line number Diff line Loading @@ -55,14 +55,6 @@ struct nvif_ioctl_new_v0 { __u64 token; __u64 object; __u32 handle; /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_IOCTL_NEW_V0_CONTROL -1 #define NVIF_IOCTL_NEW_V0_PERFMON -2 #define NVIF_IOCTL_NEW_V0_PERFDOM -3 #define NVIF_IOCTL_NEW_V0_SW_NV04 -4 #define NVIF_IOCTL_NEW_V0_SW_NV10 -5 #define NVIF_IOCTL_NEW_V0_SW_NV50 -6 #define NVIF_IOCTL_NEW_V0_SW_GF100 -7 __s32 oclass; __u8 data[]; /* class data (class.h) */ }; Loading
drivers/gpu/drm/nouveau/nouveau_abi16.c +8 −8 Original line number Diff line number Diff line Loading @@ -87,18 +87,18 @@ nouveau_abi16_swclass(struct nouveau_drm *drm) { switch (drm->device.info.family) { case NV_DEVICE_INFO_V0_TNT: return NVIF_IOCTL_NEW_V0_SW_NV04; return NVIF_CLASS_SW_NV04; case NV_DEVICE_INFO_V0_CELSIUS: case NV_DEVICE_INFO_V0_KELVIN: case NV_DEVICE_INFO_V0_RANKINE: case NV_DEVICE_INFO_V0_CURIE: return NVIF_IOCTL_NEW_V0_SW_NV10; return NVIF_CLASS_SW_NV10; case NV_DEVICE_INFO_V0_TESLA: return NVIF_IOCTL_NEW_V0_SW_NV50; return NVIF_CLASS_SW_NV50; case NV_DEVICE_INFO_V0_FERMI: case NV_DEVICE_INFO_V0_KEPLER: case NV_DEVICE_INFO_V0_MAXWELL: return NVIF_IOCTL_NEW_V0_SW_GF100; return NVIF_CLASS_SW_GF100; } return 0x0000; Loading Loading @@ -433,10 +433,10 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS) /* nvsw: compatibility with older 0x*6e class identifier */ for (i = 0; !oclass && i < ret; i++) { switch (sclass[i].oclass) { case NVIF_IOCTL_NEW_V0_SW_NV04: case NVIF_IOCTL_NEW_V0_SW_NV10: case NVIF_IOCTL_NEW_V0_SW_NV50: case NVIF_IOCTL_NEW_V0_SW_GF100: case NVIF_CLASS_SW_NV04: case NVIF_CLASS_SW_NV10: case NVIF_CLASS_SW_NV50: case NVIF_CLASS_SW_GF100: oclass = sclass[i].oclass; break; default: Loading
drivers/gpu/drm/nouveau/nouveau_chan.c +1 −1 Original line number Diff line number Diff line Loading @@ -378,7 +378,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) /* allocate software object class (used for fences on <= nv05) */ if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { ret = nvif_object_init(&chan->user, 0x006e, NVIF_IOCTL_NEW_V0_SW_NV04, NVIF_CLASS_SW_NV04, NULL, 0, &chan->nvsw); if (ret) return ret; Loading
drivers/gpu/drm/nouveau/nouveau_sysfs.c +1 −1 Original line number Diff line number Diff line Loading @@ -188,7 +188,7 @@ nouveau_sysfs_init(struct drm_device *dev) if (!sysfs) return -ENOMEM; ret = nvif_object_init(&device->object, 0, NVIF_IOCTL_NEW_V0_CONTROL, ret = nvif_object_init(&device->object, 0, NVIF_CLASS_CONTROL, NULL, 0, &sysfs->ctrl); if (ret == 0) device_create_file(nvxx_device(device)->dev, &dev_attr_pstate); Loading