Loading drivers/ide/pci/cmd64x.c +0 −18 Original line number Diff line number Diff line Loading @@ -334,24 +334,6 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha { u8 mrdmode = 0; if (dev->device == PCI_DEVICE_ID_CMD_646) { switch (dev->revision) { case 0x07: case 0x05: printk("%s: UltraDMA capable\n", name); break; case 0x03: default: printk("%s: MultiWord DMA force limited\n", name); break; case 0x01: printk("%s: MultiWord DMA limited, " "IRQ workaround enabled\n", name); break; } } /* Set a good latency timer and cache line size value. */ (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); /* FIXME: pci_set_master() to ensure a good latency timer value */ Loading Loading
drivers/ide/pci/cmd64x.c +0 −18 Original line number Diff line number Diff line Loading @@ -334,24 +334,6 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha { u8 mrdmode = 0; if (dev->device == PCI_DEVICE_ID_CMD_646) { switch (dev->revision) { case 0x07: case 0x05: printk("%s: UltraDMA capable\n", name); break; case 0x03: default: printk("%s: MultiWord DMA force limited\n", name); break; case 0x01: printk("%s: MultiWord DMA limited, " "IRQ workaround enabled\n", name); break; } } /* Set a good latency timer and cache line size value. */ (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); /* FIXME: pci_set_master() to ensure a good latency timer value */ Loading