Loading arch/sh/kernel/cpu/sh4/probe.c +5 −4 Original line number Diff line number Diff line Loading @@ -50,23 +50,24 @@ int __init detect_cpu_and_cache_system(void) boot_cpu_data.dcache.ways = 1; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; /* We don't know the chip cut */ boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; /* * Setup some generic flags we can probe on SH-4A parts */ if (((pvr >> 24) & 0xff) == 0x10) { if (((pvr >> 16) & 0xff) == 0x10) { if ((cvr & 0x10000000) == 0) boot_cpu_data.flags |= CPU_HAS_DSP; boot_cpu_data.flags |= CPU_HAS_LLSC; boot_cpu_data.cut_major = pvr & 0x7f; } /* FPU detection works for everyone */ if ((cvr & 0x20000000) == 1) boot_cpu_data.flags |= CPU_HAS_FPU; /* We don't know the chip cut */ boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; /* Mask off the upper chip ID */ pvr &= 0xffff; Loading Loading
arch/sh/kernel/cpu/sh4/probe.c +5 −4 Original line number Diff line number Diff line Loading @@ -50,23 +50,24 @@ int __init detect_cpu_and_cache_system(void) boot_cpu_data.dcache.ways = 1; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; /* We don't know the chip cut */ boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; /* * Setup some generic flags we can probe on SH-4A parts */ if (((pvr >> 24) & 0xff) == 0x10) { if (((pvr >> 16) & 0xff) == 0x10) { if ((cvr & 0x10000000) == 0) boot_cpu_data.flags |= CPU_HAS_DSP; boot_cpu_data.flags |= CPU_HAS_LLSC; boot_cpu_data.cut_major = pvr & 0x7f; } /* FPU detection works for everyone */ if ((cvr & 0x20000000) == 1) boot_cpu_data.flags |= CPU_HAS_FPU; /* We don't know the chip cut */ boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; /* Mask off the upper chip ID */ pvr &= 0xffff; Loading