Loading drivers/gpu/drm/nouveau/include/nvif/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ u64 nvif_device_time(struct nvif_device *); nv_device(_device->object.priv); \ }) #define nvxx_bios(a) nvxx_device(a)->bios #define nvxx_fb(a) nvkm_fb(nvxx_device(a)) #define nvxx_fb(a) nvxx_device(a)->fb #define nvxx_mmu(a) nvkm_mmu(nvxx_device(a)) #define nvxx_bar(a) nvxx_device(a)->bar #define nvxx_gpio(a) nvkm_gpio(nvxx_device(a)) Loading drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h +31 −43 Original line number Diff line number Diff line Loading @@ -46,59 +46,47 @@ struct nvkm_fb_tile { }; struct nvkm_fb { const struct nvkm_fb_func *func; struct nvkm_subdev subdev; bool (*memtype_valid)(struct nvkm_fb *, u32 memtype); struct nvkm_ram *ram; struct { struct nvkm_fb_tile region[16]; int regions; void (*init)(struct nvkm_fb *, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *); void (*comp)(struct nvkm_fb *, int i, u32 size, u32 flags, struct nvkm_fb_tile *); void (*fini)(struct nvkm_fb *, int i, struct nvkm_fb_tile *); void (*prog)(struct nvkm_fb *, int i, struct nvkm_fb_tile *); } tile; }; static inline struct nvkm_fb * nvkm_fb(void *obj) { /* fbram uses this before device subdev pointer is valid */ if (nv_iclass(obj, NV_SUBDEV_CLASS) && nv_subidx(obj) == NVDEV_SUBDEV_FB) return obj; return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_FB); } extern struct nvkm_oclass *nv04_fb_oclass; extern struct nvkm_oclass *nv10_fb_oclass; extern struct nvkm_oclass *nv1a_fb_oclass; extern struct nvkm_oclass *nv20_fb_oclass; extern struct nvkm_oclass *nv25_fb_oclass; extern struct nvkm_oclass *nv30_fb_oclass; extern struct nvkm_oclass *nv35_fb_oclass; extern struct nvkm_oclass *nv36_fb_oclass; extern struct nvkm_oclass *nv40_fb_oclass; extern struct nvkm_oclass *nv41_fb_oclass; extern struct nvkm_oclass *nv44_fb_oclass; extern struct nvkm_oclass *nv46_fb_oclass; extern struct nvkm_oclass *nv47_fb_oclass; extern struct nvkm_oclass *nv49_fb_oclass; extern struct nvkm_oclass *nv4e_fb_oclass; extern struct nvkm_oclass *nv50_fb_oclass; extern struct nvkm_oclass *g84_fb_oclass; extern struct nvkm_oclass *gt215_fb_oclass; extern struct nvkm_oclass *mcp77_fb_oclass; extern struct nvkm_oclass *mcp89_fb_oclass; extern struct nvkm_oclass *gf100_fb_oclass; extern struct nvkm_oclass *gk104_fb_oclass; extern struct nvkm_oclass *gk20a_fb_oclass; extern struct nvkm_oclass *gm107_fb_oclass; bool nvkm_fb_memtype_valid(struct nvkm_fb *, u32 memtype); void nvkm_fb_tile_init(struct nvkm_fb *, int region, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *); void nvkm_fb_tile_fini(struct nvkm_fb *, int region, struct nvkm_fb_tile *); void nvkm_fb_tile_prog(struct nvkm_fb *, int region, struct nvkm_fb_tile *); int nv04_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv10_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv1a_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv20_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv25_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv30_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv35_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv36_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv40_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv41_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv44_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv46_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv47_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv49_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv4e_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv50_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int g84_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gt215_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int mcp77_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk20a_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gm107_fb_new(struct nvkm_device *, int, struct nvkm_fb **); #include <subdev/bios.h> #include <subdev/bios/ramcfg.h> Loading drivers/gpu/drm/nouveau/nouveau_bo.c +3 −9 Original line number Diff line number Diff line Loading @@ -50,22 +50,16 @@ nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg, int i = reg - drm->tile.reg; struct nvkm_fb *fb = nvxx_fb(&drm->device); struct nvkm_fb_tile *tile = &fb->tile.region[i]; struct nvkm_engine *engine; nouveau_fence_unref(®->fence); if (tile->pitch) fb->tile.fini(fb, i, tile); nvkm_fb_tile_fini(fb, i, tile); if (pitch) fb->tile.init(fb, i, addr, size, pitch, flags, tile); nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile); fb->tile.prog(fb, i, tile); if ((engine = nvkm_engine(fb, NVDEV_ENGINE_GR))) engine->tile_prog(engine, i); if ((engine = nvkm_engine(fb, NVDEV_ENGINE_MPEG))) engine->tile_prog(engine, i); nvkm_fb_tile_prog(fb, i, tile); } static struct nouveau_drm_tile * Loading drivers/gpu/drm/nouveau/nouveau_gem.c +1 −1 Original line number Diff line number Diff line Loading @@ -259,7 +259,7 @@ nouveau_gem_ioctl_new(struct drm_device *dev, void *data, struct nouveau_bo *nvbo = NULL; int ret = 0; if (!fb->memtype_valid(fb, req->info.tile_flags)) { if (!nvkm_fb_memtype_valid(fb, req->info.tile_flags)) { NV_PRINTK(err, cli, "bad page flags: 0x%08x\n", req->info.tile_flags); return -EINVAL; } Loading drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +69 −69 Original line number Diff line number Diff line Loading @@ -80,7 +80,7 @@ nv4_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv04_devinit_new, // .fb = nv04_fb_new, .fb = nv04_fb_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, Loading @@ -100,7 +100,7 @@ nv5_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv05_devinit_new, // .fb = nv04_fb_new, .fb = nv04_fb_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, Loading @@ -120,7 +120,7 @@ nv10_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -139,7 +139,7 @@ nv11_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -160,7 +160,7 @@ nv15_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -181,7 +181,7 @@ nv17_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -202,7 +202,7 @@ nv18_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -223,7 +223,7 @@ nv1a_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv1a_devinit_new, // .fb = nv1a_fb_new, .fb = nv1a_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -244,7 +244,7 @@ nv1f_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv1a_devinit_new, // .fb = nv1a_fb_new, .fb = nv1a_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -265,7 +265,7 @@ nv20_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv20_fb_new, .fb = nv20_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -286,7 +286,7 @@ nv25_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -307,7 +307,7 @@ nv28_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -328,7 +328,7 @@ nv2a_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -349,7 +349,7 @@ nv30_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv30_fb_new, .fb = nv30_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -370,7 +370,7 @@ nv31_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv30_fb_new, .fb = nv30_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -392,7 +392,7 @@ nv34_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -414,7 +414,7 @@ nv35_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv35_fb_new, .fb = nv35_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -435,7 +435,7 @@ nv36_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv36_fb_new, .fb = nv36_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -457,7 +457,7 @@ nv40_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv40_fb_new, .fb = nv40_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -482,7 +482,7 @@ nv41_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -507,7 +507,7 @@ nv42_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -532,7 +532,7 @@ nv43_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -557,7 +557,7 @@ nv44_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv44_fb_new, .fb = nv44_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -582,7 +582,7 @@ nv45_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv40_fb_new, .fb = nv40_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -607,7 +607,7 @@ nv46_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -632,7 +632,7 @@ nv47_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv47_fb_new, .fb = nv47_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -657,7 +657,7 @@ nv49_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv49_fb_new, .fb = nv49_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -682,7 +682,7 @@ nv4a_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv44_fb_new, .fb = nv44_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -707,7 +707,7 @@ nv4b_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv49_fb_new, .fb = nv49_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -732,7 +732,7 @@ nv4c_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -757,7 +757,7 @@ nv4e_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv4e_fb_new, .fb = nv4e_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv4e_i2c_new, // .imem = nv40_instmem_new, Loading @@ -783,7 +783,7 @@ nv50_chipset = { .bus = nv50_bus_new, .clk = nv50_clk_new, .devinit = nv50_devinit_new, // .fb = nv50_fb_new, .fb = nv50_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading @@ -810,7 +810,7 @@ nv63_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -835,7 +835,7 @@ nv67_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -860,7 +860,7 @@ nv68_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -886,7 +886,7 @@ nv84_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -917,7 +917,7 @@ nv86_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -948,7 +948,7 @@ nv92_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -979,7 +979,7 @@ nv94_chipset = { .bus = g94_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1016,7 +1016,7 @@ nv96_chipset = { // .mc = g94_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, Loading Loading @@ -1047,7 +1047,7 @@ nv98_chipset = { // .mc = g98_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, Loading @@ -1072,7 +1072,7 @@ nva0_chipset = { .bus = g94_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -1103,7 +1103,7 @@ nva3_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1136,7 +1136,7 @@ nva5_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1168,7 +1168,7 @@ nva8_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1200,7 +1200,7 @@ nvaa_chipset = { .bus = g94_bus_new, .clk = mcp77_clk_new, .devinit = g98_devinit_new, // .fb = mcp77_fb_new, .fb = mcp77_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1231,7 +1231,7 @@ nvac_chipset = { .bus = g94_bus_new, .clk = mcp77_clk_new, .devinit = g98_devinit_new, // .fb = mcp77_fb_new, .fb = mcp77_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1262,7 +1262,7 @@ nvaf_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = mcp89_devinit_new, // .fb = mcp89_fb_new, .fb = mcp89_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1294,7 +1294,7 @@ nvc0_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1329,7 +1329,7 @@ nvc1_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1363,7 +1363,7 @@ nvc3_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1397,7 +1397,7 @@ nvc4_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1432,7 +1432,7 @@ nvc8_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1467,7 +1467,7 @@ nvce_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1502,7 +1502,7 @@ nvcf_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1536,7 +1536,7 @@ nvd7_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = gf110_gpio_new, // .i2c = gf117_i2c_new, Loading Loading @@ -1568,7 +1568,7 @@ nvd9_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = gf110_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1602,7 +1602,7 @@ nve4_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1638,7 +1638,7 @@ nve6_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1674,7 +1674,7 @@ nve7_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1708,7 +1708,7 @@ nvea_chipset = { .bar = gk20a_bar_new, .bus = gf100_bus_new, .clk = gk20a_clk_new, // .fb = gk20a_fb_new, .fb = gk20a_fb_new, // .fuse = gf100_fuse_new, // .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, Loading @@ -1734,7 +1734,7 @@ nvf0_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1770,7 +1770,7 @@ nvf1_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1806,7 +1806,7 @@ nv106_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1841,7 +1841,7 @@ nv108_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1876,7 +1876,7 @@ nv117_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gm107_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1905,7 +1905,7 @@ nv124_chipset = { .bios = nvkm_bios_new, .bus = gf100_bus_new, .devinit = gm204_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, Loading Loading @@ -1934,7 +1934,7 @@ nv126_chipset = { .bios = nvkm_bios_new, .bus = gf100_bus_new, .devinit = gm204_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, Loading @@ -1961,7 +1961,7 @@ nv12b_chipset = { .name = "GM20B", .bar = gk20a_bar_new, .bus = gf100_bus_new, // .fb = gk20a_fb_new, .fb = gk20a_fb_new, // .fuse = gm107_fuse_new, // .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, Loading Loading
drivers/gpu/drm/nouveau/include/nvif/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ u64 nvif_device_time(struct nvif_device *); nv_device(_device->object.priv); \ }) #define nvxx_bios(a) nvxx_device(a)->bios #define nvxx_fb(a) nvkm_fb(nvxx_device(a)) #define nvxx_fb(a) nvxx_device(a)->fb #define nvxx_mmu(a) nvkm_mmu(nvxx_device(a)) #define nvxx_bar(a) nvxx_device(a)->bar #define nvxx_gpio(a) nvkm_gpio(nvxx_device(a)) Loading
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h +31 −43 Original line number Diff line number Diff line Loading @@ -46,59 +46,47 @@ struct nvkm_fb_tile { }; struct nvkm_fb { const struct nvkm_fb_func *func; struct nvkm_subdev subdev; bool (*memtype_valid)(struct nvkm_fb *, u32 memtype); struct nvkm_ram *ram; struct { struct nvkm_fb_tile region[16]; int regions; void (*init)(struct nvkm_fb *, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *); void (*comp)(struct nvkm_fb *, int i, u32 size, u32 flags, struct nvkm_fb_tile *); void (*fini)(struct nvkm_fb *, int i, struct nvkm_fb_tile *); void (*prog)(struct nvkm_fb *, int i, struct nvkm_fb_tile *); } tile; }; static inline struct nvkm_fb * nvkm_fb(void *obj) { /* fbram uses this before device subdev pointer is valid */ if (nv_iclass(obj, NV_SUBDEV_CLASS) && nv_subidx(obj) == NVDEV_SUBDEV_FB) return obj; return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_FB); } extern struct nvkm_oclass *nv04_fb_oclass; extern struct nvkm_oclass *nv10_fb_oclass; extern struct nvkm_oclass *nv1a_fb_oclass; extern struct nvkm_oclass *nv20_fb_oclass; extern struct nvkm_oclass *nv25_fb_oclass; extern struct nvkm_oclass *nv30_fb_oclass; extern struct nvkm_oclass *nv35_fb_oclass; extern struct nvkm_oclass *nv36_fb_oclass; extern struct nvkm_oclass *nv40_fb_oclass; extern struct nvkm_oclass *nv41_fb_oclass; extern struct nvkm_oclass *nv44_fb_oclass; extern struct nvkm_oclass *nv46_fb_oclass; extern struct nvkm_oclass *nv47_fb_oclass; extern struct nvkm_oclass *nv49_fb_oclass; extern struct nvkm_oclass *nv4e_fb_oclass; extern struct nvkm_oclass *nv50_fb_oclass; extern struct nvkm_oclass *g84_fb_oclass; extern struct nvkm_oclass *gt215_fb_oclass; extern struct nvkm_oclass *mcp77_fb_oclass; extern struct nvkm_oclass *mcp89_fb_oclass; extern struct nvkm_oclass *gf100_fb_oclass; extern struct nvkm_oclass *gk104_fb_oclass; extern struct nvkm_oclass *gk20a_fb_oclass; extern struct nvkm_oclass *gm107_fb_oclass; bool nvkm_fb_memtype_valid(struct nvkm_fb *, u32 memtype); void nvkm_fb_tile_init(struct nvkm_fb *, int region, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *); void nvkm_fb_tile_fini(struct nvkm_fb *, int region, struct nvkm_fb_tile *); void nvkm_fb_tile_prog(struct nvkm_fb *, int region, struct nvkm_fb_tile *); int nv04_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv10_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv1a_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv20_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv25_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv30_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv35_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv36_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv40_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv41_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv44_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv46_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv47_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv49_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv4e_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int nv50_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int g84_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gt215_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int mcp77_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk20a_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gm107_fb_new(struct nvkm_device *, int, struct nvkm_fb **); #include <subdev/bios.h> #include <subdev/bios/ramcfg.h> Loading
drivers/gpu/drm/nouveau/nouveau_bo.c +3 −9 Original line number Diff line number Diff line Loading @@ -50,22 +50,16 @@ nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg, int i = reg - drm->tile.reg; struct nvkm_fb *fb = nvxx_fb(&drm->device); struct nvkm_fb_tile *tile = &fb->tile.region[i]; struct nvkm_engine *engine; nouveau_fence_unref(®->fence); if (tile->pitch) fb->tile.fini(fb, i, tile); nvkm_fb_tile_fini(fb, i, tile); if (pitch) fb->tile.init(fb, i, addr, size, pitch, flags, tile); nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile); fb->tile.prog(fb, i, tile); if ((engine = nvkm_engine(fb, NVDEV_ENGINE_GR))) engine->tile_prog(engine, i); if ((engine = nvkm_engine(fb, NVDEV_ENGINE_MPEG))) engine->tile_prog(engine, i); nvkm_fb_tile_prog(fb, i, tile); } static struct nouveau_drm_tile * Loading
drivers/gpu/drm/nouveau/nouveau_gem.c +1 −1 Original line number Diff line number Diff line Loading @@ -259,7 +259,7 @@ nouveau_gem_ioctl_new(struct drm_device *dev, void *data, struct nouveau_bo *nvbo = NULL; int ret = 0; if (!fb->memtype_valid(fb, req->info.tile_flags)) { if (!nvkm_fb_memtype_valid(fb, req->info.tile_flags)) { NV_PRINTK(err, cli, "bad page flags: 0x%08x\n", req->info.tile_flags); return -EINVAL; } Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +69 −69 Original line number Diff line number Diff line Loading @@ -80,7 +80,7 @@ nv4_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv04_devinit_new, // .fb = nv04_fb_new, .fb = nv04_fb_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, Loading @@ -100,7 +100,7 @@ nv5_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv05_devinit_new, // .fb = nv04_fb_new, .fb = nv04_fb_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, Loading @@ -120,7 +120,7 @@ nv10_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -139,7 +139,7 @@ nv11_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -160,7 +160,7 @@ nv15_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -181,7 +181,7 @@ nv17_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -202,7 +202,7 @@ nv18_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -223,7 +223,7 @@ nv1a_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv1a_devinit_new, // .fb = nv1a_fb_new, .fb = nv1a_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -244,7 +244,7 @@ nv1f_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv1a_devinit_new, // .fb = nv1a_fb_new, .fb = nv1a_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -265,7 +265,7 @@ nv20_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv20_fb_new, .fb = nv20_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -286,7 +286,7 @@ nv25_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -307,7 +307,7 @@ nv28_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -328,7 +328,7 @@ nv2a_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv25_fb_new, .fb = nv25_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -349,7 +349,7 @@ nv30_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv30_fb_new, .fb = nv30_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -370,7 +370,7 @@ nv31_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv30_fb_new, .fb = nv30_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -392,7 +392,7 @@ nv34_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv10_devinit_new, // .fb = nv10_fb_new, .fb = nv10_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -414,7 +414,7 @@ nv35_chipset = { .bus = nv04_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv35_fb_new, .fb = nv35_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -435,7 +435,7 @@ nv36_chipset = { .bus = nv31_bus_new, .clk = nv04_clk_new, .devinit = nv20_devinit_new, // .fb = nv36_fb_new, .fb = nv36_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, Loading @@ -457,7 +457,7 @@ nv40_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv40_fb_new, .fb = nv40_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -482,7 +482,7 @@ nv41_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -507,7 +507,7 @@ nv42_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -532,7 +532,7 @@ nv43_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv41_fb_new, .fb = nv41_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -557,7 +557,7 @@ nv44_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv44_fb_new, .fb = nv44_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -582,7 +582,7 @@ nv45_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv40_fb_new, .fb = nv40_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -607,7 +607,7 @@ nv46_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -632,7 +632,7 @@ nv47_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv47_fb_new, .fb = nv47_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -657,7 +657,7 @@ nv49_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv49_fb_new, .fb = nv49_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -682,7 +682,7 @@ nv4a_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv44_fb_new, .fb = nv44_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -707,7 +707,7 @@ nv4b_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv49_fb_new, .fb = nv49_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -732,7 +732,7 @@ nv4c_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -757,7 +757,7 @@ nv4e_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv4e_fb_new, .fb = nv4e_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv4e_i2c_new, // .imem = nv40_instmem_new, Loading @@ -783,7 +783,7 @@ nv50_chipset = { .bus = nv50_bus_new, .clk = nv50_clk_new, .devinit = nv50_devinit_new, // .fb = nv50_fb_new, .fb = nv50_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading @@ -810,7 +810,7 @@ nv63_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -835,7 +835,7 @@ nv67_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -860,7 +860,7 @@ nv68_chipset = { .bus = nv31_bus_new, .clk = nv40_clk_new, .devinit = nv1a_devinit_new, // .fb = nv46_fb_new, .fb = nv46_fb_new, // .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, Loading @@ -886,7 +886,7 @@ nv84_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -917,7 +917,7 @@ nv86_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -948,7 +948,7 @@ nv92_chipset = { .bus = nv50_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -979,7 +979,7 @@ nv94_chipset = { .bus = g94_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1016,7 +1016,7 @@ nv96_chipset = { // .mc = g94_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, Loading Loading @@ -1047,7 +1047,7 @@ nv98_chipset = { // .mc = g98_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, Loading @@ -1072,7 +1072,7 @@ nva0_chipset = { .bus = g94_bus_new, .clk = g84_clk_new, .devinit = g84_devinit_new, // .fb = g84_fb_new, .fb = g84_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = nv50_i2c_new, Loading Loading @@ -1103,7 +1103,7 @@ nva3_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1136,7 +1136,7 @@ nva5_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1168,7 +1168,7 @@ nva8_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = gt215_devinit_new, // .fb = gt215_fb_new, .fb = gt215_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1200,7 +1200,7 @@ nvaa_chipset = { .bus = g94_bus_new, .clk = mcp77_clk_new, .devinit = g98_devinit_new, // .fb = mcp77_fb_new, .fb = mcp77_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1231,7 +1231,7 @@ nvac_chipset = { .bus = g94_bus_new, .clk = mcp77_clk_new, .devinit = g98_devinit_new, // .fb = mcp77_fb_new, .fb = mcp77_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1262,7 +1262,7 @@ nvaf_chipset = { .bus = g94_bus_new, .clk = gt215_clk_new, .devinit = mcp89_devinit_new, // .fb = mcp89_fb_new, .fb = mcp89_fb_new, // .fuse = nv50_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1294,7 +1294,7 @@ nvc0_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1329,7 +1329,7 @@ nvc1_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1363,7 +1363,7 @@ nvc3_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1397,7 +1397,7 @@ nvc4_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1432,7 +1432,7 @@ nvc8_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1467,7 +1467,7 @@ nvce_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1502,7 +1502,7 @@ nvcf_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = g94_gpio_new, // .i2c = g94_i2c_new, Loading Loading @@ -1536,7 +1536,7 @@ nvd7_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = gf110_gpio_new, // .i2c = gf117_i2c_new, Loading Loading @@ -1568,7 +1568,7 @@ nvd9_chipset = { .bus = gf100_bus_new, .clk = gf100_clk_new, .devinit = gf100_devinit_new, // .fb = gf100_fb_new, .fb = gf100_fb_new, // .fuse = gf100_fuse_new, // .gpio = gf110_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1602,7 +1602,7 @@ nve4_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1638,7 +1638,7 @@ nve6_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1674,7 +1674,7 @@ nve7_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1708,7 +1708,7 @@ nvea_chipset = { .bar = gk20a_bar_new, .bus = gf100_bus_new, .clk = gk20a_clk_new, // .fb = gk20a_fb_new, .fb = gk20a_fb_new, // .fuse = gf100_fuse_new, // .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, Loading @@ -1734,7 +1734,7 @@ nvf0_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1770,7 +1770,7 @@ nvf1_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1806,7 +1806,7 @@ nv106_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1841,7 +1841,7 @@ nv108_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gf100_devinit_new, // .fb = gk104_fb_new, .fb = gk104_fb_new, // .fuse = gf100_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, Loading Loading @@ -1876,7 +1876,7 @@ nv117_chipset = { .bus = gf100_bus_new, .clk = gk104_clk_new, .devinit = gm107_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, Loading Loading @@ -1905,7 +1905,7 @@ nv124_chipset = { .bios = nvkm_bios_new, .bus = gf100_bus_new, .devinit = gm204_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, Loading Loading @@ -1934,7 +1934,7 @@ nv126_chipset = { .bios = nvkm_bios_new, .bus = gf100_bus_new, .devinit = gm204_devinit_new, // .fb = gm107_fb_new, .fb = gm107_fb_new, // .fuse = gm107_fuse_new, // .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, Loading @@ -1961,7 +1961,7 @@ nv12b_chipset = { .name = "GM20B", .bar = gk20a_bar_new, .bus = gf100_bus_new, // .fb = gk20a_fb_new, .fb = gk20a_fb_new, // .fuse = gm107_fuse_new, // .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, Loading