Commit 01a787f7 authored by Linh Phung's avatar Linh Phung Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a779f0: Add HSCIF nodes



Extracted from a bigger patch in the BSP, rebased and DMA
properties added.

Signed-off-by: default avatarLinh Phung <linh.phung.jy@renesas.com>
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614095109.8175-1-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent c62872a6
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+68 −0
Original line number Diff line number Diff line
@@ -436,6 +436,74 @@ i2c5: i2c@e66e0000 {
			status = "disabled";
		};

		hscif0: serial@e6540000 {
			compatible = "renesas,hscif-r8a779f0",
				     "renesas,rcar-gen4-hscif", "renesas,hscif";
			reg = <0 0xe6540000 0 0x60>;
			interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 514>,
				 <&cpg CPG_CORE R8A779F0_CLK_S0D3>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x31>, <&dmac0 0x30>,
			       <&dmac1 0x31>, <&dmac1 0x30>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
			resets = <&cpg 514>;
			status = "disabled";
		};

		hscif1: serial@e6550000 {
			compatible = "renesas,hscif-r8a779f0",
				     "renesas,rcar-gen4-hscif", "renesas,hscif";
			reg = <0 0xe6550000 0 0x60>;
			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 515>,
				 <&cpg CPG_CORE R8A779F0_CLK_S0D3>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x33>, <&dmac0 0x32>,
			       <&dmac1 0x33>, <&dmac1 0x32>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
			resets = <&cpg 515>;
			status = "disabled";
		};

		hscif2: serial@e6560000 {
			compatible = "renesas,hscif-r8a779f0",
				     "renesas,rcar-gen4-hscif", "renesas,hscif";
			reg = <0 0xe6560000 0 0x60>;
			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 516>,
				 <&cpg CPG_CORE R8A779F0_CLK_S0D3>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x35>, <&dmac0 0x34>,
			       <&dmac1 0x35>, <&dmac1 0x34>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
			resets = <&cpg 516>;
			status = "disabled";
		};

		hscif3: serial@e66a0000 {
			compatible = "renesas,hscif-r8a779f0",
				     "renesas,rcar-gen4-hscif", "renesas,hscif";
			reg = <0 0xe66a0000 0 0x60>;
			interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 517>,
				 <&cpg CPG_CORE R8A779F0_CLK_S0D3>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x37>, <&dmac0 0x36>,
			       <&dmac1 0x37>, <&dmac1 0x36>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
			resets = <&cpg 517>;
			status = "disabled";
		};

		ufs: ufs@e6860000 {
			compatible = "renesas,r8a779f0-ufs";
			reg = <0 0xe6860000 0 0x100>;