chisel6.4.0 < Back
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# Packages

-  package root
  Definition Classes
    root
-  package chisel3

  This package contains the main chisel3 API.

  This package contains the main chisel3 API.

  Definition Classes
    root
-  package stage
  Definition Classes
    chisel3
-  package phases
  Definition Classes
    stage
- AddDedupGroupAnnotations
- AddImplicitOutputAnnotationFile
- AddImplicitOutputFile
- AddSerializationAnnotations
- AspectPhase
- Checks
- Convert
- Elaborate
- Emitter
- MaybeAspectPhase
- MaybeInjectingPhase

p

chisel3.stage

# phases

#### package phases

### Type Members

1.  class AddDedupGroupAnnotations extends Phase
2.  class AddImplicitOutputAnnotationFile extends Phase

   Adds an firrtl.options.OutputAnnotationFileAnnotation if one does not exist.

   Adds an firrtl.options.OutputAnnotationFileAnnotation if one does not exist. This replicates old behavior where an output annotation file was always written.

3.  class AddImplicitOutputFile extends Phase

   Add a output file for a Chisel circuit, derived from the top module in the circuit, if no ChiselOutputFileAnnotation already exists.

4.  class AddSerializationAnnotations extends Phase

   Adds stage.CircuitSerializationAnnotations based on ChiselOutputFileAnnotation

5.  class AspectPhase extends Phase

   Phase that consumes all Aspects and calls their toAnnotationSeq methods.

   Phase that consumes all Aspects and calls their toAnnotationSeq methods.

   Consumes the chisel3.stage.DesignAnnotation and converts every `Aspect` into their annotations prior to executing FIRRTL

6.  class Checks extends Phase

   Sanity checks an firrtl.AnnotationSeq before running the main firrtl.options.Phases of `chisel3.stage.ChiselStage`.

7.  class Convert extends Phase

   This prepares a `ChiselCircuitAnnotation for compilation with FIRRTL. This does three things:`

   This prepares a `ChiselCircuitAnnotation for compilation with FIRRTL. This does three things:`

   - Uses `chisel3.internal.firrtl.Converter` to generate a FirrtlCircuitAnnotation``
   - Extracts all `firrtl.annotations.Annotation`s from the `chisel3.internal.firrtl.Circuit`
   - Generates any needed `RunFirrtlTransformAnnotation`s from extracted `firrtl.annotations.Annotation`s
8.  class Elaborate extends Phase

   Elaborate all chisel3.stage.ChiselGeneratorAnnotations into chisel3.stage.ChiselCircuitAnnotations.

9.  class Emitter extends Phase

   Emit a chisel3.stage.ChiselCircuitAnnotation to a file if a chisel3.stage.ChiselOutputFileAnnotation is present.

   Emit a chisel3.stage.ChiselCircuitAnnotation to a file if a chisel3.stage.ChiselOutputFileAnnotation is present.

   To do

     This should be switched to support correct emission of multiple circuits to multiple files.

10.  class MaybeAspectPhase extends Phase

    Run AspectPhase if a chisel3.aop.Aspect is present.

11.  class MaybeInjectingPhase extends Phase

    Run `InjectingPhase` if a `InjectStatement` is present.

### Ungrouped