28#ifndef __PlatformInformation_H__
29#define __PlatformInformation_H__
40#define OGRE_CPU_UNKNOWN 0
44#define OGRE_CPU_MIPS 4
48#if (defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))) || \
49 (defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__)))
50# define OGRE_CPU OGRE_CPU_X86
52#elif OGRE_PLATFORM == OGRE_PLATFORM_APPLE && defined(__BIG_ENDIAN__)
53# define OGRE_CPU OGRE_CPU_PPC
54#elif OGRE_PLATFORM == OGRE_PLATFORM_APPLE
55# define OGRE_CPU OGRE_CPU_X86
56#elif OGRE_PLATFORM == OGRE_PLATFORM_APPLE_IOS && (defined(__i386__) || defined(__x86_64__))
57# define OGRE_CPU OGRE_CPU_X86
58#elif defined(__arm__) || defined(_M_ARM) || defined(__arm64__) || defined(__aarch64__)
59# define OGRE_CPU OGRE_CPU_ARM
60#elif defined(__mips64) || defined(__mips64_)
61# define OGRE_CPU OGRE_CPU_MIPS
63# define OGRE_CPU OGRE_CPU_UNKNOWN
68#if OGRE_COMPILER == OGRE_COMPILER_MSVC
69# define OGRE_ALIGNED_DECL(type, var, alignment) __declspec(align(alignment)) type var
71#elif (OGRE_COMPILER == OGRE_COMPILER_GNUC) || (OGRE_COMPILER == OGRE_COMPILER_CLANG)
72# define OGRE_ALIGNED_DECL(type, var, alignment) type var __attribute__((__aligned__(alignment)))
75# define OGRE_ALIGNED_DECL(type, var, alignment) type var
80#if OGRE_CPU == OGRE_CPU_X86
81# define OGRE_SIMD_ALIGNMENT 16
84# define OGRE_SIMD_ALIGNMENT 16
89#define OGRE_SIMD_ALIGNED_DECL(type, var) OGRE_ALIGNED_DECL(type, var, OGRE_SIMD_ALIGNMENT)
93#if OGRE_DOUBLE_PRECISION == 0 && OGRE_CPU == OGRE_CPU_X86 && OGRE_COMPILER == OGRE_COMPILER_MSVC && \
94 OGRE_PLATFORM != OGRE_PLATFORM_NACL
95# define __OGRE_HAVE_SSE 1
96#elif OGRE_DOUBLE_PRECISION == 0 && OGRE_CPU == OGRE_CPU_X86 && (OGRE_COMPILER == OGRE_COMPILER_GNUC || OGRE_COMPILER == OGRE_COMPILER_CLANG) && \
97 OGRE_PLATFORM != OGRE_PLATFORM_APPLE_IOS && OGRE_PLATFORM != OGRE_PLATFORM_NACL
98# define __OGRE_HAVE_SSE 1
103#if OGRE_DOUBLE_PRECISION == 0 && OGRE_CPU == OGRE_CPU_ARM && (OGRE_COMPILER == OGRE_COMPILER_GNUC || OGRE_COMPILER == OGRE_COMPILER_CLANG) && defined(__ARM_ARCH_6K__) && defined(__VFP_FP__)
104# define __OGRE_HAVE_VFP 1
109#if OGRE_DOUBLE_PRECISION == 0 && OGRE_CPU == OGRE_CPU_ARM && (OGRE_COMPILER == OGRE_COMPILER_GNUC || OGRE_COMPILER == OGRE_COMPILER_CLANG) && defined(__ARM_ARCH_7A__) && defined(__ARM_NEON__)
110# define __OGRE_HAVE_NEON 1
115#if OGRE_DOUBLE_PRECISION == 0 && OGRE_CPU == OGRE_CPU_MIPS && (OGRE_COMPILER == OGRE_COMPILER_GNUC || OGRE_COMPILER == OGRE_COMPILER_CLANG) && defined(__mips_msa)
116# define __OGRE_HAVE_MSA 1
119#ifndef __OGRE_HAVE_SSE
120# define __OGRE_HAVE_SSE 0
123#ifndef __OGRE_HAVE_VFP
124# define __OGRE_HAVE_VFP 0
127#ifndef __OGRE_HAVE_NEON
128# define __OGRE_HAVE_NEON 0
131#ifndef __OGRE_HAVE_MSA
132# define __OGRE_HAVE_MSA 0
163#if OGRE_CPU == OGRE_CPU_X86
164 CPU_FEATURE_SSE = 1 << 0,
165 CPU_FEATURE_SSE2 = 1 << 1,
166 CPU_FEATURE_SSE3 = 1 << 2,
167 CPU_FEATURE_MMX = 1 << 3,
168 CPU_FEATURE_MMXEXT = 1 << 4,
169 CPU_FEATURE_3DNOW = 1 << 5,
170 CPU_FEATURE_3DNOWEXT = 1 << 6,
171 CPU_FEATURE_CMOV = 1 << 7,
172 CPU_FEATURE_TSC = 1 << 8,
173 CPU_FEATURE_FPU = 1 << 9,
174 CPU_FEATURE_PRO = 1 << 10,
175 CPU_FEATURE_HTT = 1 << 11,
176#elif OGRE_CPU == OGRE_CPU_ARM
177 CPU_FEATURE_VFP = 1 << 12,
178 CPU_FEATURE_NEON = 1 << 13,
179#elif OGRE_CPU == OGRE_CPU_MIPS
180 CPU_FEATURE_MSA = 1 << 14,